the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. mos field effect transistor np110n04pug switching n-channel power mos fet data sheet document no. d16852ej1v0ds00 (1st edition) date published july 2004 ns cp(k) printed in japan 2004 description the np110n04pug is n-channel mos field effect transistor designed for high current switching applications. features ? channel temperature 175 degree rating ? super low on-state resistance r ds(on) = 1.8 m ? max. (v gs = 10 v, i d = 55 a) ? low c iss : c iss = 17100 pf typ. absolute maximum ratings (t a = 25 c) drain to source voltage (v gs = 0 v) v dss 40 v gate to source voltage (v ds = 0 v) v gss 20 v drain current (dc) (t c = 25 c) i d(dc) 110 a drain current (pulse) note1 i d(pulse) 440 a total power dissipation (t a = 25 c) p t1 1.8 w total power dissipation (t c = 25 c) p t2 288 w channel temperature t ch 175 c storage temperature t stg ? 55 to +175 c repetitive avalanche current note2 i ar 72 a repetitive avalanche energy note2 e ar 518 mj notes 1. pw 10 s, duty cycle 1% 2. t ch 150c, v dd = 20 v, r g = 25 ? , v gs = 20 0 v thermal resistance channel to case thermal resistance r th(ch-c) 0.52 c/w channel to ambient thermal resistance r th(ch-a) 83.3 c/w ordering information part number package np110n04pug to-263 (mp-25zp) (to-263)
data sheet d16852ej1v0ds 2 np110n04pug electrical characteristics (t a = 25 c) characteristics symbol test conditions min. typ. max. unit zero gate voltage drain current i dss v ds = 40 v, v gs = 0 v 1 a gate leakage current i gss v gs = 20 v, v ds = 0 v 100 na gate to source threshold voltage note v gs(th) v ds = v gs , i d = 250 a 2.0 3.0 4.0 v forward transfer admittance note | y fs | v ds = 10 v, i d = 55 a 45 89 s drain to source on-state resistance note r ds(on) v gs = 10 v, i d = 55 a 1.4 1.8 m ? input capacitance c iss v ds = 25 v 17100 25700 pf output capacitance c oss v gs = 0 v 1420 2130 pf reverse transfer capacitance c rss f = 1 mhz 890 1610 pf turn-on delay time t d(on) v dd = 20 v, i d = 55 a 54 120 ns rise time t r v gs = 10 v 140 350 ns turn-off delay time t d(off) r g = 0 ? 130 260 ns fall time t f 21 60 ns total gate charge q g v dd = 32 v 260 390 nc gate to source charge q gs v gs = 10 v 57 nc gate to drain charge q gd i d = 110 a 83 nc body diode forward voltage note v f(s-d) i f = 110 a, v gs = 0 v 0.9 1.5 v reverse recovery time t rr i f = 110 a, v gs = 0 v 60 ns reverse recovery charge q rr di/dt = 100 a/ s 80 nc note pulsed test circuit 3 gate charge v gs = 20 0 v pg. r g = 25 ? 50 ? d.u.t. l v dd test circuit 1 avalanche capability pg. d.u.t. r l v dd test circuit 2 switching time r g pg. i g = 2 ma 50 ? d.u.t. r l v dd i d v dd i as v ds bv dss starting t ch v gs 0 = 1 s duty cycle 1% v gs wave form v ds wave form v gs v ds 10% 0 0 90% 90% 90% v gs v ds t on t off t d(on) t r t d(off) t f 10% 10%
data sheet d16852ej1v0ds 3 np110n04pug typical characteristics (t a = 25c) derating factor of forward bias safe operating area total power dissipation vs. case temperature dt - percentage of rated power - % 0 20 40 60 80 100 120 0 25 50 75 100 125 150 175 t c - case temperature - c p t - total power dissipation - w 0 50 100 150 200 250 300 0 25 50 75 100 125 150 175 t c - case temperature - c forward bias safe operating area i d - drain current - a 0.1 1 10 100 1000 0.1 1 10 100 1 ms 10 ms i d(pulse) = 440 a i d(dc) = 110 a t c = 25c single pulse r ds(on) limited (at v gs = 10 v) dc pw = 100 s v ds - drain to source voltage - v transient thermal resistance vs. pulse width r th(t) - transient thermal resistance - c/w 0.001 0.01 0.1 1 10 100 1000 r th(ch-a) = 83.3c/w r th(ch-c) = 0.52c/w single pulse pw - pulse width - s 100 1 m 10 m 100 m 1 10 100 1000
data sheet d16852ej1v0ds 4 np110n04pug drain current vs. drain to source voltage forward transfer characteristics i d - drain current - a 0 100 200 300 400 500 0 0.2 0.4 0.6 0.8 v gs = 10 v pulsed v ds - drain to source voltage - v i d - drain current - a 0.001 0.01 0.1 1 10 100 1000 0123456 t a = ? 55c ? 25c 25c 75c 125c 150c 175c v ds = 10 v pulsed v gs - gate to source voltage - v gate to source threshold voltage vs. channel temperature forward transfer admittance vs. drain current v gs(th) - gate to source threshold voltage - v 0 1 2 3 4 -100 -50 0 50 100 150 200 v ds = v gs i d = 250 a t ch - channel temperature - c | y fs | - forward transfer admittance - s 1 10 100 1000 1 10 100 1000 v ds = 10 v pulsed t a = ? 55c 25c 85c 125c 175c i d - drain current - a drain to source on-state resistance vs. drain current drain to source on-state resistance vs. gate to source voltage r ds(on) - drain to source on-state resistance - m ? ? 0 1 2 3 4 5 0 5 10 15 20 25 pulsed i d = 110 a 55 a 22 a v gs - gate to source voltage - v
data sheet d16852ej1v0ds 5 np110n04pug drain to source on-state resistance vs. channel temperature capacitance vs. drain to source voltage r ds(on) - drain to source on-state resistance - m ? ? t d(off) t d(on) t r t f i d - drain current - a v ds - drain to source voltage - v 0 10 20 30 40 50 0 50 100 150 200 250 300 0 2 4 6 8 10 i d = 110 a v ds v gs v dd = 32 v 20 v 8 v q g - gate charge - nc v gs - gate to source voltage - v source to drain diode forward voltage reverse recovery time vs. diode forward current i f - diode forward current - a 0.1 1 10 100 1000 00.511.5 0 v pulsed v gs = 10 v v f(s-d) - source to drain voltage - v t rr - reverse recovery time - ns 10 100 0.1 1 10 100 1000 di/dt = 100 a/ s v gs = 0 v i f - diode forward current - a
data sheet d16852ej1v0ds 6 np110n04pug package drawing (unit: mm) to-263 (mp-25zp) 10.0 ?.3 2.54 0.75 ?.2 0.5 9.15 ?.3 2.54 ?.25 15.25 ?.5 1.35 ?.3 2 13 4 2.5 4.45 ?.2 1.3 ?.2 0.6 ?.2 0 to 8? 1. gate 2. drain 3. source 4. fin (drain) 0.025 to 0.25 0.25 equivalent circuit source body diode gate drain remark strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred.
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